1. Field of the Invention
The present invention relates to a semiconductor device and, more particularly, to a semiconductor device packaged in CSP (Chip Size Package) form.
2. Description of the Background Art
FIG. 9 is a schematic cross-sectional view showing conventional CSP mounting. A semiconductor device 1 is directly mounted in the form of a chip on a printed board 2 for the purpose of reducing the area required to mount the semiconductor device 1 on the printed board 2. The semiconductor device 1 in chip form comprises solder bumps 11 through which the semiconductor device 1 is connected to the printed board 2.
FIG. 10 is a schematic cross-sectional view showing another type of conventional CSP mounting. As shown in FIG. 10, the semiconductor device 1 in chip form is, in some cases, covered with a molding resin 12 which allows the solder bumps 11 to be exposed.
FIGS. 11 through 14 are cross-sectional views showing a method of fabricating a conventional semiconductor device in the order of sequential process steps. Referring to FIG. 11, diffusion layers 101a and 101b functioning as a source and a drain are formed in an upper surface of a semiconductor substrate 101 of silicon, for example. An interlayer insulation film 102 made of, for example, silicon oxide is formed on the semiconductor substrate 101. With a gate insulating film (equated with the interlayer insulation film 102 for purposes of simplification of illustration) therebetween, a gate 109 is opposed to the upper surface of a portion of the semiconductor substrate 101 which lies between the diffusion layers 101a and 101b. An aluminum pad 103 is connected to the diffusion layer 101b through a connecting mechanism not shown, for example, a contact hole.
A silicon nitride film 104 is formed on the structure shown in FIG. 11 by the plasma CVD process. Part of the silicon nitride film 104 which overlies the aluminum pad 103 is selectively removed by the photolithography and etching to provide the structure shown in FIG. 12.
A layer of titanium 105 and a layer of nickel 106 are deposited on the structure shown in FIG. 12 by the sputtering process. The photolithography and etching processes are performed so that the layer of titanium 105 and the layer of nickel 106 are left only in an area extending from the aluminum pad 103 to an end of the silicon nitride film 104, thereby to provide the structure shown in FIG. 13.
A solder bump 11 is disposed on a multilayer structure consisting of the aluminum pad 103, the layer of titanium 105, and the layer of nickel 106 in the structure shown in FIG. 13 to provide the structure shown in FIG. 14.
It is well known in the art that, when irradiated with an alpha ray 91, electrons 93 and holes 92 generated in semiconductor cause operation errors of a semiconductor device. Although the molding resin 12 covers the semiconductor device with the solder bumps 11 exposed as shown in FIG. 10, there has been a need to use a polyimide resin, for example, which is less pervious to alpha rays than the material of the typical molding resin 12 to shield and protect the semiconductor device against the alpha rays.
Unfortunately, it has been difficult for the polyimide resin to shield and protect the semiconductor device in chip form used in the conventional CSP mounting against the alpha rays. The production of a polyimide in place of or on the silicon nitride film 104 might result in the removal of the layer of titanium 105 and the layer of nickel 106 and the generation of the uneven or rough surfaces thereof.
These problems result from a film-deposition temperature exceeding 300xc2x0 C. at which the layer of titanium 105 and the layer of nickel 106 are deposited by the sputtering process. In general, a polyimide is produced by dehydrating carboxylic polyamide in a liquid state by heating at a temperature of 300xc2x0 C. to 350xc2x0 C. to cause polymerization to occur. However, it is difficult to completely remove moisture contained in the carboxylic polyamide. The moisture remaining in the polyimide might be released during the sputtering of the layer of titanium 105 and the layer of nickel 106 to result in the problems of the removal thereof and the generation of the uneven surfaces thereof.
Further, stresses are applied between the semiconductor chip and the printed board since the printed board generally has greater thermal expansion properties than the semiconductor chip. In the CSP mounting, there are no stress-relieved lead frames in lead frame type packaging, resulting in difficulties in relieving stresses after packaging. The difficulties in the stress relief present the likelihood of cracks generated in the semiconductor substrate 101. The diffusion layers 101a and 101b are generally formed in an impurity diffusion region known as a well. The generation of cracks in the well significantly degrades transistor characteristics.
According to a first aspect of the present invention, a semiconductor device comprises: a semiconductor layer provided in an insulating layer and including a transistor having an SOI structure formed therein; an electrode provided on the insulating layer; and an electrically conductive bump provided on the electrode.
Preferably, according to a second aspect of the present invention, in the semiconductor device of the first aspect, the transistor includes a plurality of transistors field-shield isolated from each other and formed in the semiconductor layer.
A third aspect of the present invention is also intended for a method of fabricating a semiconductor device. According to the present invention, the method comprises the steps of: (a) forming an electrode on a semiconductor substrate; and (b) forming an electrically conductive bump on the electrode and forming an insulating film for blocking an alpha ray and covering an upper surface of the semiconductor substrate except the electrode.
Preferably, according to a fourth aspect of the present invention, in the method of the third aspect, the step (b) comprises the steps of (b-1) forming the insulating film for blocking the alpha ray and covering the upper surface of the semiconductor substrate so that at least part of the electrode is exposed, and (b-2) forming the electrically conductive bump on the exposed part of the electrode.
Preferably, according to a fifth aspect of the present invention, in the method of the third aspect, the step (b) comprises the steps of (b-1) forming the bump on the electrode, and (b-2) dropping the material of the insulating film for blocking the alpha ray onto the upper surface of the semiconductor substrate except onto the electrode.
According to a sixth aspect of the present invention, a semiconductor device comprises: a semiconductor substrate; an electrode disposed on the semiconductor substrate; an electrically conductive bump provided on the electrode; a film covering the semiconductor substrate except the bump and for blocking an alpha ray; a first element disposed in the semiconductor substrate in an area that is visible from the bump without being obstructed by the film; and a second element disposed in the semiconductor substrate in other than the area, the second element being less resistant to the alpha ray than the first element.
Preferably, according to a seventh aspect of the present invention, in the semiconductor device of the sixth aspect, the first element is a MOS transistor having a body at a fixed potential.
The semiconductor device of the first and second aspects of the present invention may perform the so-called CSP mounting wherein the conductive bump is connected to a printed board. Additionally, the transistor has the SOI structure, and electrons and holes generated due to an alpha ray in the semiconductor layer in which the transistor is formed are in amounts which do not influence the operation of the transistor. Further, there is a low likelihood of cracks generated in the semiconductor layer because of stresses resulting from the difference in thermal expansion coefficient between the printed board and the semiconductor device which have been a problem in the CSP mounting.
In accordance with the method of the third to fifth aspects of the present invention, if the alpha ray blocking film made of a polyimide which is not resistant to heating after being formed is used as the insulating film, influences of the increase in temperature during the formation of the electrode upon the insulating film are avoided since the formation of the electrode underlying the bump precedes the formation of the insulating film.
In accordance with the semiconductor device of the sixth aspect of the present invention, the first element which is highly resistant to an alpha ray is formed in the area wherein no film blocks the alpha ray coming from the bump. This allows effective area use and avoids adverse effects resulting from the alpha ray.
In accordance with the semiconductor device of the seventh aspect of the present invention, the body of the MOS transistor serving as the first element is at the fixed potential. This suppresses parasitic bipolar effects to further increase the resistance to the alpha ray.
It is therefore an object of the present invention to provide a semiconductor device for CSP mounting which avoids errors resulting from an alpha ray or which is highly resistant to stresses.
These and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.